In today's electronics industry, advanced semiconductor chip design and assembly techniques allow for increased levels of integration and the production of more compact electronic devices. For example, dual packages are utilized that include different types of semiconductor devices within the same package. One example may be an ASIC (application specific integrated circuit) product chip that may be used in a dual package with a MEMS (microelectromechanical) part. Other advantageous packaging techniques may utilize MEMS parts in combination with one or more other product chips within a package. The increased integration levels in packaging may utilize bonding techniques other than conventional wire bonding or soldering. One such technique involves the bonding of an ASIC product chip within a package by directly joining the ASIC product chip to another device such as a MEMS device.
Some of the new techniques for packaging semiconductor chips and/or coupling semiconductor chips to other components benefit from having non-conventional structures on the semiconductor chip. These unconventional structures enable the advances in packaging integration, but there are typically challenges associated with producing the non-conventional structures using conventional semiconductor processing methods due to the limitations in the conventional semiconductor processing methods. In particular, it is challenging to produce defect-free non-conventional structures using processing methods developed to produce conventional structures.
The disclosure addresses the limitations in the chip structures available for such non-conventional bonding due to the shortcomings and limitations associated with the processing techniques used to manufacture semiconductor chips.